Where load requirements dictate the switching of high-amperage, direct-current (such as in welding operations, etc.) prior art methods have been found to be either extremely expensive or generally unsatisfatory. The utilization of extremely high-current transistors is, of course, expensive and prior art paralleling techniques heretofore have resorted to individual discrete emitter or base resistances with the power losses inherent in their utilization. The general problem involved in paralleling transistors is the result of the broad parametric range of junction characteristics, which in turn, results in failure to share load current during turn-on, on-state (saturation), and turn-off, which in turn, causes destruction of the junction.
Another scheme in limited use lies in the selection of power transistors with matched parameters. The problems encountered here lie in replacement situations, parameter variations because of aging, and relatively high initial costs.